Freescale Semiconductor /MK60D10 /SPI1 /PUSHR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PUSHR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TXDATA0 (0)PCS0 (0)CTCNT 0 (0)EOQ 0 (000)CTAS0 (0)CONT

CTAS=000, CONT=0, PCS=0, EOQ=0, CTCNT=0

Description

PUSH TX FIFO Register In Master Mode

Fields

TXDATA

Transmit Data

PCS

Select which PCS signals are to be asserted for the transfer

0 (0): Negate the PCS[x] signal.

1 (1): Assert the PCS[x] signal.

CTCNT

Clear Transfer Counter

0 (0): Do not clear the TCR[TCNT] field.

1 (1): Clear the TCR[TCNT] field.

EOQ

End Of Queue

0 (0): The SPI data is not the last data to transfer.

1 (1): The SPI data is the last data to transfer.

CTAS

Clock and Transfer Attributes Select

0 (000): CTAR0

1 (001): CTAR1

CONT

Continuous Peripheral Chip Select Enable

0 (0): Return PCSn signals to their inactive state between transfers.

1 (1): Keep PCSn signals asserted between transfers.

Links

() ()